Design of a Multivalue Logic Ternary and Quaternary Addition

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Research areas:
Year:
2015
Type of Publication:
Article
Keywords:
MVL, Binary, Ternary Multiplexer, Quaternary Addition, Senary, Duodecimal, Octal, Hexadecimal
Authors:
Miss. Manjushri B. Hande; Mr. Ashish Raghuwanshi
Journal:
IJAIM
Volume:
4
Number:
3
Pages:
121-123
Month:
November
Abstract:
The number system use in binary requires large number of interconnect which occupy around seventy percent area on an integrated chip. This limitation of area is reducing by using multivalue logic number system. The two logic number systems are available in multivalue logic system i.e. ternary number system and quaternary number system. The circuit design using multivalue system is more advantageous if it use with binary logic system. This can be done by using binary to multivalue logic conversions. In this work the multivalue logic system arithmetic operation is present. It involves the MVL circuit for half adder and full adder circuit.
Full text: IJAIM_509_Final.pdf

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