Noise Suppression in Dynamic CMOS Base Zipper Logic

Hits: 2019
Research areas:
Year:
2015
Type of Publication:
Article
Keywords:
MTCMOS, CMOS Complementary Metal Oxide Semiconductor, Sleep Transistor, Zipper CMOS
Authors:
Gyanendra Kumar Phate; Sandeep Shrivastava
Journal:
IJAIM
Volume:
4
Number:
3
Pages:
117-120
Month:
November
Abstract:
Leakage current in CMOS circuit is suppress using multiple threshold CMOS (MTCMOS) technique. This can be done by using series connect transistor. MTCMOS uses low threshold voltage transistor for computation and high threshold voltage transistor as a switch to disconnect power the power supply during standby mode. The high threshold voltage transistor is connected between the power supply voltage Vdd and Vss rail connected to the logic gate circuit. This extra transistor increases the impedance between the supply voltages an digital gate circuits. Noise due to supply noise and internal node noise is the major concern in this work. A triple-phase sleep signal technique using 50nm technology is proposed.
Full text: IJAIM_497_Final.pdf

Indexed By