Implementation of Bit Error Rate Measurement and PRBS Generation using LFSR

Research areas:

• Volume 4,Issue 3, Nov. 2015

Year:

2015

Type of Publication:

Article

Keywords:

LFSR Linear Feedback Shift Register, FPGA Field Programmable Gate Array, LUT, BERT, PRBS

Authors:

Uttam Kumar Mishra; Tarun Verma

Journal:

IJAIM

Volume:

4

Number:

3

Pages:

89-91

Month:

November

Abstract:

One of the basic measures of the performance of any digital communication system is Bit error rate (BER) test. For the digital data source, it is common to use a pseudorandom number generator (PRNG). Linear feedback shift registers (LFSRs) are undoubtedly the best known register-based PRNGs. The purpose of this research is to develop a digital true random number generator using linear feedback shift register (LFSR) that can be synthesized using standard digital design tools. Random number generators will be required to protect the medical, financial and personal data of entities connected to these networks. Because of their compactness, fast bit-level operations, and the exponential increase of their period with the width of the shift register, LFSRs have enjoyed success in many hardware-based simulations and digital circuit testing.

Full text: IJAIM_485_Final.pdf